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 Preliminary 3
Typical Applications * CATV Set-Top Boxes * Cable Modems * Cable-Ready TVs
RF3330
IF GAIN CONTROLLED AMPLIFIER
3
1.59 1.61 0.365 0.15 0.05
The RF3330 is a gain-controlled amplifier suitable for application in the IF receive section of a cable tuner. It consists of a high impedance differential input stage, a low impedance differential output stage, and a differential gain-controlled amplifier. The voltage gain may be varied by applying an analog control voltage. The device is fabricated on an advanced Bi-CMOS process, and is housed in an eight-lead SOT23 package.
2.80 3.00
0.650 2.60 3.00 3MAX 0MIN 1.44 1.04 0.127
*When Pin 1 is in upper left, text reads downward (as shown).
0.35 0.55
Optimum Technology Matching(R) Applied
Package Style: SOT23-8
uSi Bi-CMOS
Si BJT
GaAs HBT SiGe HBT
GaAs MESFET Si CMOS
Features * Single 5V Positive Power Supply * 26dB Gain Range * 150MHz Bandwidth
VCC 1 GND 2 VOUT 3 VOUTB 4
Biasing & AGC Control
8 VCC 7 VIN 6 VINB 5 VAGC
* Compact Package
Ordering Information
RF3330 RF3330 PCBA RF3330 PCBA IF Gain Controlled Amplifier Fully Assembled Evaluation Board - 75 Fully Assembled Evaluation Board - 50 Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
Functional Block Diagram
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA
Rev A2 010820
3-1
LINEAR CATV AMPLIFIERS
Product Description
TEXT*
RF3330
Absolute Maximum Ratings Parameter
Supply Voltage Operating Ambient Temperature Storage Temperature
Preliminary
Rating
7 -40 to +85 -60 to +150
Unit
V C C
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
3
Overall
LINEAR CATV AMPLIFIERS
Specification Min. Typ. Max.
Unit
Condition
Typical performance is at TA =+25C, VCC =5V.
DC Specifications
Supply Voltage Supply Current AGC Control Voltage AGC Input Impedance 4.75 0.5 10 150 33.0 34.0 8.0 5.0 18 5.25 25 3.3 V mA V M MHz dB dB dBmV(rms) dBmV(rms) dBmV(rms) dBc dBmV(rms) dBmV(rms) nV/rtHz nV/rtHz k pF VAGC =3.3V VAGC =0.5V While meeting distortion specification While meeting distortion specification Maximum Gain Output level=50dBmV(rms); VAGC =3.3V Output level=50dBmV(rms); VAGC =3.3V Output level=50dBmV(rms); VAGC =0.5V
0.5V=Minimum Gain 3.3V=Maximum Gain
AC Specifications
3dB Bandwidth Voltage Gain Maximum Minimum Maximum Input Level Maximum Output Level Output 1dB Compression Output Harmonic Distortion Input IP3, Maximum Gain Input IP3, Minimum Gain Input Noise, Maximum Gain Input Noise, Minimum Gain Output Impedance Input Impedance Output Load Impedance Output Load Capacitance
10.0 50 50 -40
66 -44 45 60 4.5 42 10 2000 1
2
Differential Differential Differential Differential
3-2
Rev A2 010820
Preliminary
Pin 1 2 3 Function VCC GND VOUT Description
Supply Voltage Supply Ground Output pin.
RF3330
Interface Schematic
OUT OUTB
3
LINEAR CATV AMPLIFIERS
4
VOUTB
Complementary output pin.
OUT OUTB
5
VAGC
AGC control voltage.
100 k VAGC
10 k VREF
6
VINB
Complementary input pin. This should be externally AC-coupled to signal source.
1 k VBIAS IN 75 1 k VBIAS INB
7
VIN
Input pin. This should be externally AC-coupled to signal source.
1 k VBIAS IN 75 1 k VBIAS INB
8
VCC
Supply Voltage
Rev A2 010820
3-3
RF3330
Pin Out
Preliminary
VCC 1 GND 2 VOUT 3
8 7 6 5
VCC VIN VINB VAGC
3
LINEAR CATV AMPLIFIERS
VOUTB 4
Application Schematic
VCC
100 pF 8 VIN VINB VAGC 7 6 5 Biasing & AGC Control 1 2 3 4 Note orientation of board.
3.3F
+
VOUT VOUTB
3-4
Rev A2 010820
Preliminary
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
P1 P1-1 1 2 P1-3 3 4 VCC VCC GND AGC GND
RF3330
HEADER4
3
C4* DNI
8 J2 VIN
(BAL)
50 strip 50 strip 50 strip C7 100 nF C8 100 nF
F1* 7 6 5
Biasing & AGC Control
1 2 3 4 R4 470 R2 470 R3 51
6 5 4
R1* DNI
J3 VIN
(BAL)
50 strip
1 2 3
J5 VOUT
(BAL)
J1 VIN
(UNBAL)
T1
TTWB 1010-1
Note orientation of board.
3330410-
50 strip C5* DNI
AGC R6 5.1 k C6 33 nF
J4 VOUT
(UNBAL)
R5* DNI
NOTES: 1. C3, Tantulum Capacitor: Case Size Y, 6.3 V. 2. See Evaluation Test Procedure for more information. 3. Parts with * following the reference designator should not be populated on the evaluation board.
Rev A2 010820
3-5
LINEAR CATV AMPLIFIERS
+ C3 3.3 F
C2 100 nF
C9 100 pF
C1 100 pF
RF3330
Evaluation Board Layout Board Size 2.0" x 2.0"
Board Thickness 0.062", Board Material FR-4
Preliminary
3
LINEAR CATV AMPLIFIERS
3-6
Rev A2 010820
Preliminary
Evaluation Test Procedure
Introduction The RF3330 is an IF amplifier with AGC, designed for use in Cable Television applications. Voltage gain is varied using an analog voltage control signal. The differential input is high impedance (2000) and the differential output is low impedance (10). The 3dB bandwidth is 150MHz and has a maximum voltage gain of 34dB and a minimum voltage gain of 8dB. The AGC Control Voltage ranges from 0.5V for minimum gain to 3.3V for maximum gain. The device is packaged in the SOT23-8, which minimizes board area. Evaluation Board The 3330410 board has been designed to achieve maximum versatility for device evaluation. The board is designed for either a differential or single-ended input signal. Likewise, the output can be either singly or differentially loaded. There is also a separate VCC and AGC voltage pin. For constant maximum gain applications, the VCC and AGC pins can be tied together. Input For differential operation on the input, the J1 connector (VIN unbalanced) is not required. Differential voltages are applied directly through connectors J2 and J3 (VIN balanced). DC blocking capacitors are also provided to protect equipment or upstream components. Boards ordered from RF Micro Devices are assembled in this configuration. Single-ended operation on the input can be accomplished in two ways. The first option uses the differential board setup as described above, with the addition of an external low frequency 180 power combiner. The combiner splits the single input signal into two signals with inverted phase. The second option for singleended operation utilizes a SAW filter which converts from double to single-ended. The current evaluation board has an option to insert a SAW filter on the input. For this setup, the J1 connector (VIN unbalanced) would be utilized. The 3330410 board has been evaluated using a 44MHz Siemens+Matsushita filter. This is a common IF frequency used in cable modem applications. Table 1. SAW Filters
EPCOS P/N X6857D X6966M X6964D X6855M X6866D X6965M FC (MHz) 36.000 36.125 43.750 44.000 44.000 44.000
RF3330
Output For differential operation on the output, the optional C4, C5, R1, and R5 would be inserted and the T1 transformer would be removed. The J4 (VOUT unbalanced) and J5 (VOUT balanced) connectors would be uses as differential outputs. For single-ended operation on the output, only the J4 connector (VOUT unbalanced) is used and only one analyzer is necessary. There is a 1:1 transformer to convert the unbalanced output to a balanced signal. The amplifier is designed to drive a 1000 load. Driving a 50 load, presented by the spectrum analyzer will cause the amplifier to saturate. In order to present a 1000 load to the amplifier a resistive matching circuit is on the board. Boards ordered from RF Micro Devices are assembled in this configuration. Test Setup Calibration Because of the fact that the impedances of the amplifier are not 50, there are some special considerations when calibrating a test setup.The evaluation test setup is shown in Figure 1. Input As stated previously, the balanced input impedance of the RF3330 is 2000. The signal generator used has an unbalanced 50 source, and is typically used in unbalanced 50 impedance systems. Due to this load mismatch, a positive amplitude offset needs to be applied to the signal generator. The formulas used to calculate this offset are given below in Equations 1 through 3. It should be noted that the unbalanced 1000 load is used, because all data in the datasheet is referenced to single-ended operation. Using a spectrum analyzer probe, the actual offset measured was 7.5dB, and this is what is used for the amplitude offset in the signal generator. Mismatch Loss (ML)=-10*log(1-|L|2) L =(Z-Z0)/(Z+Z0) Eq. 1 Eq. 2
3
LINEAR CATV AMPLIFIERS
ML=-10*log(1-[(1000-50)/(1000+50)]2)=7.4dB Eq. 3
Rev A2 010820
3-7
RF3330
Output On the output, the losses due to the resistive matching pad must also be calibrated out of the setup. Because of the 1:1 transformer, the spectrum analyzer appears as a 50 resistor in parallel with this circuit (see Figure 2). Equation 4 illustrates the calculation necessary to obtain the amount of loss due to this matching circuit. The balun also has an additional 0.5dB to 1.0dB of
Preliminary
loss, which is added in to the overall output losses. This was verified with a spectrum analyzer probe. The offset used in the test setup is 32.5dB on the spectrum analyzer. Resistive Pad Loss= 20*log(25/(470+25+470))=-31.7dB
Eq. 4
3
LINEAR CATV AMPLIFIERS
Frequency = 1 MHz to 150 MHz Signal Generator
Frequency = 1 MHz to 150 MHz Mini-Circuits ZMSCJ-2-1 Divider
RF3330
Resistive Match
1:1 Transformer
Frequency = 1 MHz to 150 MHz Spectrum Analyzer
3330410 Evaluation Board
Figure 1. RF3330 Test Setup
R4 470 R3 51 R2 470 50
Figure 2. Equivalent Output Circuit
3-8
Rev A2 010820
RF3330
65.0
Preliminary
IIP3 versus Gain VCC=5.0V, F=50MHz
-40C
40.0 -40C 35.0 +25C +85C 30.0
Gain versus VGC VCC=5.0V, F=50MHz
60.0
+25C +85C
55.0
IIP3 (dBmV)
Gain (dB)
25.0
50.0
3
LINEAR CATV AMPLIFIERS
20.0
45.0 15.0
40.0
10.0
35.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0
5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
Gain (dB)
VGC (V)
65.0
IIP3 versus VGC VCC=5.0V, F=50MHz
-40C +25C
60.0
+85C
IIP3 (dBmV)
55.0
50.0
45.0
40.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VGC (V)
3-9
Rev A2 010820
RF3330
Preliminary
3
LINEAR CATV AMPLIFIERS
3-10
Rev A2 010820


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